ANSYS Apache Totem 14.1 Linux64 (电源完整性设计)

  • 软件大小|Size:474.7MB
  • 软件语言|Language:英文
  • 运行环境|Platform:/Linux64
  • 使用方式|License:浮动License
  • 更新时间|Release:2017-12-27
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  • 历史版本|Version:1
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  • 标 签|Tag:ANSYS   Apache   Totem   

软件介绍|Description ——介绍来源于互联网,具体功能以官方为准。

Apache Totem可以用于数模混合信号IC 电源完整性设计,瞬态压降,退藕分析等。ANSYS Totem是用于模拟,混合信号和定制数字设计的晶体管级功率噪声和可靠性仿真平台。 Totem的核心技术包括芯片代工认证的提取和模拟引擎嵌入在强大的GUI环境,使基于布局的结果分析和设计修复。 该软件可以分析大型全芯片设计,包括具有SPICE级精度的封装和衬底寄生效应。 它帮助设计师满足对IP和/或模拟和定制设计越来越严格的功率和可靠性要求。
ANSYS Apache Totem 14.1 Linux64
ANSYS Totem is a transistor-level power noise and reliability simulation platform for analog, mixed-signal and custom digital designs. Totem’s core technologies include foundry-certified extraction and simulation engines embedded within a powerful GUI environment that enable layout-based result analysis and design fixing. The software can analyze large full-chip designs, including package and substrate parasitics with SPICE-level accuracy. It helps designers meet increasingly stringent power and reliability requirements for IPs and/or analog and custom designs.
Totem is used to validate and sign-off custom macros or IPs (analog, custom digital, memory) against static and dynamic voltage drop. It is also useful for power and signal electromigration (EM) requirements. Multiple foundries have certified ANSYS Totem for EM and electrostatic discharge (ESD) rules for advanced technology nodes (20/16/14 nm).
Totem also creates detailed models of the IPs, verifying that these are connected appropriately at the SoC level and that operation at the full-chip level is not adversely affected due to poor design or noise coupling issues. Totem’s model-generation capabilities enable seamless IP integration at the SoC level for full-chip mixed-signal verification.
Totem has been successfully correlated with silicon measurements for multiple technology nodes. It can be used from early in the design phase, during prototyping through sign-off. 

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