Coventor SEMulator3D是一个强大的3D半导体和MEMS工艺建模平台，提供广泛的技术开发能力。 基于高效的物理驱动体素建模技术，SEMulator3D具有模拟完整工艺流程的独特能力。利用SEMulator3D虚拟制造平台，工程团队可以高效地开发工艺流程并在实际制造之前执行自动虚拟实验。
– 任何工艺和版图的可应用性，regardless of complexity or technology
Coventor SEMulator3D 6.1/7.0 x64 (3D半导体和MEMS工艺建模) | 411.0MB
Coventor SEMulator3D 7.0 – the newest version of its semiconductor virtual fabrication platform. With added features, performance improvements, and a new Device Analysis capability, SEMulator3D 7.0 addresses both process and device simulation while lowering the barriers to advanced semiconductor technology development. The new Device Analysis capability enables seamless understanding of how process changes, process variability, and integration schemes directly impact transistor device performance.
SEMulator3D Device Analysis
The new Device Analysis capability can extract electrical characteristics of a transistor and explore process variability on device operation, all directly within SEMulator3D. Designers can generate transistor IV curves and perform automatic device parameter extraction from those curves. Transistor performance can be measured across changes in patterning, lithography, etch, deposition, and other process integration effects. This add-on functionality provides insight into how process integration decisions, such as patterning schemes and allowed unit process variations, impact transistor device performance.
SEMulator3D 7.0 Productivity Enhancements
The new version of SEMulator3D 7.0, which is available now, includes many additional features and performance enhancements, including:
New Calibration Function
SEMulator3D Analytics now includes a calibration function, which automates calibration of a virtual model against experimental measurements and target specifications, accelerating the generation of predictive, silicon-accurate process models.
New Viewer and Rendering Engine
An all-new rendering engine includes faster loading, interaction, construction and exporting of very large models, along with the ability to generate higher fidelity images, enabling larger models (such as 3D NAND devices) to be built faster and better.
New Netlist Extraction Feature
Using this new feature, users can extract resistance and capacitance information of sub-circuits for use in third-party SPICE simulation environments. This can be used to improve a designer’s understanding of how upstream process variations impact overall electrical circuit performance, such as circuit timing changes caused by fabrication variations.
New 3D Mesh Export Capability
Ability to generate new, high-quality Delaunay meshes, to support robust and accurate modeling of complex 3D structures such as material interfaces and feature edges.
Operating Systems: Windows 7/8.x/10.x 64Bit