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Concept SGvision 5.9.7 Win/Linux

SGvision PRO是一种分析混合电平描述的新工具,既可以在单个集成环境中调试,也可以在Verilog中描述的顶层结构和通过SPICE描述的较低层结构进行调试。

为了优化或调试器件,设计人员可以选择在晶体管级工作,用于IP /库组件和模拟模块等关键领域,同时在设计的其他领域停留在门级。 调试这样的设计以前需要单独的工具:使用SGvision PRO,现在可以看到原理图并在同一个窗口中遍历栅极和晶体管的信号流,从而提高对电路的了解并加速分析和调试。


Concept SGvision 5.9.7 Win/Linux | 21 Mb

SGvision PRO is a new tool to analyze mixed level descriptions, both top level structures described in Verilog and lower level structures described via SPICE, can be debugged in a single integrated environment.

To optimize or debug a device a designer may choose to work at transistor-level for critical areas such as IP/Library components and analog blocks, while staying at gate-level for other areas of the design. Debugging such a design has previously required separate tools: with SGvision PRO, it is now possible to see the schematics and traverse the ignal flow of both the gates and the transistors in the same window, improving understanding of the circuits and accelerating analysis and debugging.

Language: English
Operating Systems: Windows 7/8.x/10.x/RedHat Entrprise Linux 4.x-6.x


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