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Cadence Spectre 17.10 Linux

Cadence Spectre Circuit Simulator(原MMSIM)为模拟、射频(RF)和混合信号电路提供快速,准确的SPICE级仿真。它与CadenceVirtuoso定制设计平台紧密集成,可在多个域中提供详细的晶体管级分析。其卓越的架构允许低内存消耗和高容量分析。

特征
– 提供开箱即用的高性能,高容量SPICE级模拟和RF仿真,以实现准确性和融合
– 通过适用于最复杂的模拟和定制数字IC的用户友好型仿真设置,实现精度和性能之间的权衡
– 使用+ postlayout选项,通过RLCK寄生效应提供高效的布局后仿真
– 利用高效的多线程技术提高仿真吞吐量
– 模拟使用S参数模型(n端口)和有损耦合传输线(mtline)元素建模的分布式组件
– 对周期性稳态和调制信号进行RF分析,用于测量频谱响应,增益压缩,互调失真,阻抗匹配,稳定性,隔离和ACPR
– 包括先进的统计分析(Smart Monte Carlo,DCmatch,High Sigma Yield Estimation),以提高先进工艺节点IC的可制造性和良率,同时不会牺牲产品上市时间
– 与Virtuoso ADE产品套件紧密集成,提供快速交互式仿真设置,交叉探测,可视化和仿真结果的后处理
– 采用硅精密,代工厂认证的设备型号,广泛的代工支持可确保高设计质量


Cadence Spectre Circuit Simulator(Spectre) 17.10 Linux(SPICE级仿真)| 3.86 Gb

Cadence Spectre Circuit Simulator provides fast, accurate SPICE-level simulation for analog, radio frequency (RF), and mixed-signal circuits. It is tightly integrated with the Cadence Virtuoso® custom design platform and provides detailed transistor-level analysis in multiple domains. Its superior architecture allows for low memory consumption and high-capacity analysis.

Features
– Provides high-performance, high-capacity SPICE-level analog and RF simulation out of the box for accuracy and convergence
– Enable the tradeoff between accuracy and performance through user-friendly simulation setup applicable to the most complex analog and custom-digital ICs
– Uses the +postlayout option to provide efficient post-layout simulation with RLCK parasitics
– Utilizes efficient multi-threaded technology to improve simulation throughput
– Simulates distributed components modeled using S-parameter models (n-port) and lossy coupled transmission line (mtline) elements
– Performs RF analysis of periodic steady-state and modulated signals used to measure spectral response, gain compression, inter-modulation distortion, impedance matching, stability, isolation, and ACPR
– Includes advanced statistical analysis (Smart Monte Carlo, DCmatch, High Sigma Yield Estimation) to improve the manufacturability and yield of ICs at advanced process nodes without sacrificing time to market
– Tight integration with the Virtuoso ADE Product Suite provides fast interactive simulation set-up, cross-probing, visualization, and post-processing of simulation results
– Wide foundry support ensures high design quality using silicon-accurate, foundry-certified device models

Language: English
Operating Systems: RHEL 5.x

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